Altera (News - Alert) Corporation, a Silicon Valley-based manufacturer of programmable logic devices (PLDs), has expanded its field-programmable gate array (FPGA)-based solutions for the smart grid. The company is offering a high-availability seamless redundancy (HSR) reference design and a parallel redundancy protocol (PRP) reference design—both of which simplify development, implementation, and future modification of reliable, mission-critical communications systems in smart grid substations.

HSR provides zero recovery time in case of failure of one component. It is suited for applications that demand high availability and very short reaction time. Such applications are protection for electrical substation automation.

Under PRP, each network node has two Ethernet ports attached to two separate local area networks (LANs) of arbitrary, but similar topology. Because they are discrete, they are assumed to be fail-independent. A source node sends two copies of a frame simultaneously—one over each port. The two frames travel through their respective LANs until they reach a destination node, which accepts the first frame of a pair and discards the second.

Therefore, as long as one LAN is operational, the destination always receives one frame.

Developed jointly with Tampere, Finland-based  Flexibilis Oy, a provider of networking equipment and technologies for wireless and wired applications, the IEC (News - Alert) 62439-3-compliant reference design includes Flexibilis Redundant Switch (FRS) intellectual property  implemented on an Altera low-power, low-cost Cyclone-class FPGA or Cyclone V SoC (system on chip).  

"A key trend today in developing a smarter power grid is bidirectional communication and real-time control of the equipment in the grid's transmission and distribution substations," said Jason Chiang, senior strategic marketing manager in Altera's Industrial Business Unit. "Our FPGA-based HSR/PRP reference design enables equipment manufactures to build flexibility, performance, reliability and product longevity into their systems; while lowering system costs and future proofing designs."

The Flexibilis HSR/PRP IP included in the reference design is a triple-speed 10/100/1000 Mbps Ethernet Layer 2 switch that is scalable from three to eight ports and is compliant with the IEC 62439-3 standard. The IP is optimized for use on an Altera low-power, low-cost Cyclone IV FPGA, Cyclone V FPGA or Cyclone V SoC, which feature an integrated dual-core ARM (News - Alert) Cortex-A9 processor subsystem. Cyclone V SoCs enable customers to reduce component costs by implementing their HSR/PRP switch along with the associated software stacks running on the ARM processor subsystem in the FPGA. For timing synchronization, the HSR/PRP solution supports IEEE (News - Alert) 1588 Precision Time Protocol (PTP) Version 2.

"The IEC 62439-3 standard is rapidly evolving, making the flexibility of an FPGA an ideal platform to base our FSR IP on," said Heikki Ala-Juusela , chairman of the board at Flexibilis. "Altera's highly integrated FPGAs and SoCs allow users to reduce their total cost of ownership while at the same time leverage the device's performance to handle Gigabit Ethernet traffic. This HSR/PRP solution ensures designers can future-proof their substation automation systems by ensuring communication with future generations of intelligent electronics devices."

The FPGA-based HSR/PRP reference design expands Altera's reach into the smart energy market. Altera's programmable solutions provide developers of smart grid equipment the means to adapt to evolving standards and increase their system's performance and scalability.